New Updates About St Theressa Institute of Engineering & Technology
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24 January, 2025 : JEE Main - Your Ultimate Guide to the Exam. Check Here for all the resources and updates.
About Master of Technology (M.Tech) Very Large Scale Integration (VLSI) Engineering
Program Duration
Full Time
,2 Years
Course Type
PG
, Engineering
Eligibility
Atleast 55% marks in B.E. /B.Tech or equivalent in appropriate branches (50% marks for SC /ST)
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Master of Technology (M.Tech) Very Large Scale Integration (VLSI) Engineering - Highlights
| Particular | Details |
|---|---|
| Total Seats | N/A |
| Course Fee | 1,21,000 |
| Duration | 2 Years |
| Accepted Exams | GATE, |
Important Exam Events:
| Particular | Details |
|---|---|
| GATE Exam End Date | 16th February, 2025 |
Master of Technology (M.Tech) Very Large Scale Integration (VLSI) Engineering - Eligibility
Top Recruiters
TCS
IBM
Accenture
Wipro
infosys
St Theressa Institute of Engineering & Technology Program Offered
View All ProgramsContact Details
Garbham Road, Garividi , Vizianagaram Dist
28XXXXXX08
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